✦ BiCS10 and the 332-Layer NodeNarrow moat

Sandisk (SNDK) — the future bets

BiCS10 is the bet that requires no new market to exist: 332 layers, sample shipping, and second on a scoreboard Samsung leads.

BiCS10 is 332 layers, both partners are sample shipping, and mass production is expected in 2027.

BiCS10 to production332 layersthree bondedstrings4.8 Gbit/s~33% fasterthan BiCS8Sampleshippingboth partnersProduction2027at KitakamiK2 outputbeganin FY2026Samsung is at 400 layers, SK hynix 321, Micron 276. Cadence has been about two years.
The bet that requires no new market to exist: keep cost per bit falling, on schedule, every two years.

The specifics: 332 layers built by bonding three strings of 100-plus layers rather than etching one stack; a 4.8 Gbit/s interface using Toggle DDR6.0 and a separate command-address protocol, about 33% faster than BiCS8; and a QLC version that would add roughly a third to chip capacity. Production is expected at Kitakami, with the recently opened K2 fab repurposed for the node.1

This is the bet that requires no new market to exist. NAND has scaled by layers for a decade and a half, cost per bit falls with bits per wafer, and every producer's economics rest on arriving at each node roughly on time. Sandisk and Kioxia have done that every two years or so, sharing the bill.

Two things make it more than routine this cycle. The first is that K2 output began only in fiscal 2026, so the capacity to run BiCS10 at volume is new rather than converted. The second is the competitive context: Samsung is at 400 layers, SK hynix at 321, Micron at 276, and YMTC expected at 300-class.2 BiCS10 puts Sandisk second on the scoreboard.

The risk is ordinary and therefore easy to underrate. Node transitions slip, yields disappoint, and a generation arriving a year late in NAND is a year of selling more expensive bits than the competition.

Rated narrow.

Watch the production date rather than the sample date. Sample shipping is a technology milestone; volume at Kitakami in 2027 is the one that reaches cost per bit.

Moat trajectory: Widening

BiCS10 at 332 layers is sample shipping from both partners with production expected in 2027 at Kitakami, where K2 output began in fiscal 2026. The cadence is holding.

The number that tests this moat
Reported
Capital expenditure
$177M in fiscal 2026

BiCS10 will be produced at Kitakami inside the joint ventures, so Sandisk's own spending stays small while its share of venture investment rises. A jump in commitments to the ventures, not in this line, is where the new node shows.

Source: Sandisk Form 10-K, FY2026 ↗
References
  1. ReportedProduction is expected at Kitakami, with the recently opened K2 fab repurposed for the node. This is the bet that requires no new market to exist.
    Sandisk Corporation, Form 10-K FY2026 — Note 10, Related Parties and Related Commitments and Contingencies, and the related Item 1 and Item 7 disclosure on Flash Ventures. Sandisk procures all of its flash-based memory wafers from Flash Partners Ltd., Flash Alliance Ltd. and Flash Forward Ltd.; it holds a 49.9% ownership interest and Kioxia 50.1% in each. Wafers are manufactured by Kioxia at its wafer fabrication facilities in Japan using equipment individually owned or leased by each Flash Ventures entity; each entity purchases wafers from Kioxia at cost and resells them to Sandisk and Kioxia at cost plus a markup, with each partner generally entitled to 50% of output. The facilities are Y3 (Flash Partners, 2004), Y4 (Flash Alliance, 2006), Y5 (Flash Forward, 2010), New Y2 (production from 2016), Y6 (2018), K1 at Kitakami (2019), Y7 (2022) and K2 at Kitakami, whose output began in the year ended 3 July 2026. Sandisk is obligated to pay for variable costs based on a rolling three-month forecast, and purchase orders placed with Flash Ventures for up to three months are binding and cannot be cancelled; it is obligated to pay for half of Flash Ventures' fixed costs regardless of the output it chooses to purchase, and is committed to fund 49.9% to 50.0% of each entity's capital investments where operating cash flow is insufficient. Flash Ventures has historically operated at approximately 100% of manufacturing capacity; during 2026, 2025 and 2024 Sandisk temporarily reduced its utilisation and incurred costs of $11 million, $75 million and $249 million respectively, recorded as charges to cost of revenue. It participates in common R&D activities with Kioxia and is contractually committed to a minimum funding level, with R&D commitments due for 2027 of $138 million. Sandisk accounts for its ownership under the equity method; the entities are VIEs and Sandisk determined it is not the primary beneficiary of any of them, concluding on its 49.9% ownership, the voting structure and the manner in which day-to-day operations are conducted that it lacked the power to direct most of the activities that most significantly impact economic performance. Its 49.9% interest in the earnings of the entities is recognised one quarter in arrears in Other income (expense), net. Summarised financial information for the ventures: net sales of $2,775 million, $2,315 million and $2,252 million and net losses of $85 million, $63 million and $9 million for 2026, 2025 and 2024, with a gross loss of $93 million in 2026; total assets $7,320 million and total net equity of investees $1,025 million. Notes receivable and investments in Flash Ventures totalled $679 million. Sandisk made net payments to Flash Ventures of $3.6 billion, $3.4 billion and $3.4 billion in 2026, 2025 and 2024 and received distributions of $107 million and $176 million in 2026 and 2025. Maximum estimable loss exposure is $2,897 million: notes receivable $577 million, equity investments $102 million, operating lease guarantees $923 million and inventory and prepayments $1,295 million. Flash Ventures sells to and leases back a portion of its tools from a consortium of financial institutions; Sandisk guarantees half of all outstanding obligations under each lease agreement, totalling JPY149.0 billion or $923 million, in annual guarantee instalments of $378 million in 2027, $245 million in 2028, $126 million in 2029, $96 million in 2030 and $78 million in 2031. Prepayments toward Sandisk's share of future building depreciation of $840 million remain to be credited against future wafer purchases, with a further $402 million committed through fiscal 2035. On 29 January 2026 the FAL and FPL Second Commitment and Extension Agreements extended Flash Alliance and Flash Partners from 31 December 2029 to 31 December 2034, so that all three ventures co-terminate on that date; an Agreement to Enhance Collaboration commits Sandisk Technologies to pay Kioxia $1.2 billion over 2026 through 2029 in consideration of Kioxia's manufacturing services and the continued availability of supply, amortised straight-line into cost of revenue. On expiry each entity commences a wind-up and is dissolved, with net proceeds distributed in kind or cash pro rata. Flash Ventures-related commitments total $6,559 million: $2,627 million in 2027, $2,577 million in 2028-2029, $1,318 million in 2030-2031 and $37 million beyond. — FY2026 · publ. 2026-08-17 · source ↗
  2. ReportedThe second is the competitive context: Samsung is at 400 layers, SK hynix at 321, Micron at 276, and YMTC expected at 300-class. BiCS10 puts Sandisk second on the scoreboard.
    Coverage of Kioxia and Sandisk's BiCS10 3D NAND. BiCS10 is a 332-layer technology; the interface speed of 4.8 Gbit/s is 33 percent faster than BiCS8, achieved using the Toggle DDR6.0 interface and a Separate Command Address protocol. Mass BiCS10 production is expected to start in 2027 at the Kitakami plant 2 in Iwate Prefecture, Japan, and because Sandisk and Kioxia share the output of the fab through their joint venture both are sample shipping BiCS10 chips; a QLC version of the 332-layer technology would increase chip capacity by a third. The BiCS10 technology involves stacking three 100-plus layer NAND strings together rather than building a monolithic 332-layer chip. Kioxia has an intervening BiCS9 technology which uses BiCS8 218-layer 3D NAND cells with a separate CMOS logic layer providing more performance than the BiCS8 logic circuitry. For comparison, SK hynix has 321 layers in its ninth-generation 3D NAND, also using a triple string stack design; Samsung has 400 layers with its tenth-generation V-NAND, made with separate logic and NAND cell wafers producing a 1 Tbit die in what Samsung calls a Cell-on-Periphery architecture; Micron is at the 276-layer level; and China's YMTC is expected to announce 300-layer class technology. — 2026 · publ. 2026-07-03 · source ↗
Sources
Generated September 23, 2026