Node MigrationNarrow moat

The engine of cost reduction in memory is shrinking the cell, so that more bits fit on the same wafer. Every producer does this continuously, and position in the migration cycle is a large part of relative cost.

The complication is that a migration raises costs before it lowers them. A new node begins with poor yields, and until they mature the denser process is more expensive per usable bit than the one it replaces. A producer that migrates too early carries that penalty; one that migrates too late carries a structural cost disadvantage against rivals who did. The decision is a judgement, made repeatedly, with a multi-quarter lag before anyone knows whether it was right.

This is where a large, technically deep organisation earns its keep, and it is the least visible part of the business from outside. It shows up only as a gross margin that is somewhat better or worse than a competitor's in a quarter where prices were the same for both.

There is a physical limit approaching. DRAM cell scaling has become progressively harder, which is part of why the industry's growth has shifted toward stacking — more dies, rather than smaller cells. NAND took that route first, moving mass production from 176-layer technology to 238 and then 321 layers¹.

The measure is cost per bit, disclosed by nobody. The observable proxy is gross margin in a quarter when pricing was flat.