Customer Lock-In & Switching CostsWide moat
TSMC (TSM) — moat facet
Chips are co-designed for TSMC's process years in advance — leaving means redesigning for something worse.
The final pillar of TSMC's moat is the deep lock-in of its customers, created by the way leading-edge chips are designed and built. A modern advanced chip is not designed in the abstract and then sent to whichever foundry bids lowest; it is co-developed, over years, against a specific foundry's specific process, with the design tuned to that process's rules, characteristics, and quirks. A chip designed for TSMC's 3-nanometer process is, in a real sense, built for TSMC's fab — and moving it to a different foundry would mean re-engineering it, at enormous cost, risk, and delay, for a process that is almost certainly inferior. So customers stay, and the bonds tighten with every generation.
The co-development is intimate and long. Designers work hand-in-glove with TSMC years ahead of a product, aligning their roadmaps to TSMC's, optimizing their designs for TSMC's process, and relying on TSMC's design kits, IP, and support to get from concept to working silicon. This deep collaboration creates a relationship far stickier than a transactional supplier arrangement: the customer's product plans, design methodologies, and institutional expertise all become entangled with TSMC's platform. Switching foundries is not like changing a component vendor; it is like re-architecting the foundation of your product line, and few would attempt it while TSMC leads.
The switching costs are enormous and multi-dimensional. A customer moving to another foundry would face the direct cost of redesigning the chip for a new process; the risk that the new foundry's yields and reliability fall short; the delay of re-qualifying a product that might cost a market window; and the loss of the ecosystem, IP, and support tuned to TSMC. And they would be moving to an inferior process at that — trading TSMC's leading edge for a rival a generation or more behind. For a company whose competitiveness depends on having the best chip, that trade is close to unthinkable, which is why TSMC's leading customers have stayed with it generation after generation.
The lock-in is most vivid, and most consequential, in the AI boom. Nvidia and the hyperscalers designing their own AI accelerators depend utterly on TSMC to manufacture and package the chips the entire world is racing to buy — there is no alternative that can deliver leading-edge AI silicon at the performance, yield, and volume required. This has made TSMC's most important customers more dependent on it than ever, and the relationships correspondingly deeper, as TSMC allocates its scarce leading-edge and packaging capacity among the giants competing for AI supremacy — all of whom must come through TSMC.
The vulnerability is customer concentration: TSMC's fortunes are tied to a handful of giant customers — Apple and Nvidia foremost among them — whose own cycles and choices it must absorb, and whose scale gives them real negotiating power despite their dependence. This is a mutual lock-in, not a one-sided one. But mutual dependence between the world's most important chip designers and their indispensable manufacturer is a bond that holds extraordinarily tight: the customers cannot get a comparable chip elsewhere, and TSMC cannot easily be replaced. The switching costs, the co-development, and the AI-driven dependence together make TSMC's customer relationships among the stickiest in technology — a moat of a thousand engineering hours and a multi-year roadmap, binding the designers of the future's most important chips to the one company that can build them — 77% of wafer revenue in the June 2026 quarter came from nodes of 7nm and below1.
Widening. The AI boom has deepened the co-development lock-in toward near-absolute — the whole AI industry must come through TSMC — even as the tie to a few mighty buyers keeps the dependence mutual.
The customer lock-in is now dominated by AI: high-performance computing (AI accelerators) has grown to roughly two-thirds of revenue, because Nvidia and the hyperscalers depend utterly on TSMC's leading-edge and packaging. It's the moat's biggest tailwind — and its biggest concentration risk if the AI cycle turns.
Source: TSMC quarterly results / 20-F ↗- Reported77% of wafer revenue in 2Q26 came from 7nm and below.TSMC 2Q26 Quarterly Management Report (net revenue US$40.20B / NT$1,270.38B, +36.0%; gross margin 67.7%; 2nm 3%, 3nm 30%, 5nm 33%, 7nm 11% of wafer revenue, 7nm and below 77%; HPC 66% of net revenue; China 6% of net revenue; capex US$15.70B) — 2Q26 · publ. July 16, 2026 · source ↗
- TSMC Form 20-F filings — Business & Risk Factors (SEC EDGAR)
- TSMC investor relations — quarterly results, filings & events